1. Field of the Invention
The present invention relates to a motor control apparatus and method for serially transferring control data to a drive device for driving a motor.
2. Description of the Related Art
Controlling a motor in a device such as a printer is conventionally done by sending control data from a CPU to a motor drive device. Two types of data transmission paths can be used to send the control data: parallel and serial. Serial communication is more cost effective because it requires fewer transmission paths. For that reason, serial communication is widely used.
The control data sent from the CPU to the drive device typically consists of one or more types of data elements. To control a stepping motor, for example, the control data includes phase pattern data indicating the phase pattern of the voltage applied to the motor, and current data indicating the applied current. The drive device for the motor receives control data containing these data elements in a specific format, and drives the motor accordingly. Therefore, to send the control data to the drive device, the CPU must generate control data in a format compatible with the particular drive device based on the phase pattern data, phase current data, and other required data elements, and then serially transfer the control data to the drive device.
This control data has conventionally been generated through an operating process run by the CPU. After writing data to the data buffers that temporarily store the control data elements, the CPU runs the process to generate the control data, and then passes the resulting control data to another circuit for serial transfer. This process must be run every time the data in the data buffers is updated, and this puts a significant processing load on the CPU.
Furthermore, because the control data generating process must be run according to whether data is updated in the data buffer (that is, whether data is written to the data buffer), the CPU must be aware of the data write timing. This means that data cannot be written to the data buffer by direct memory access (DMA), bypassing the CPU. The CPU must therefore also handle writing data to the data buffer, thus further increasing the processing load on the CPU.